DC S command at Tue Mar 27 12:52:09 2018 (39.29c (release 19-06-2017),compiled Jun 19 2017,17:34:06) Experiment: D:\Data\xs1714a\pre_xs1714a DC INFO: Park option in use (0.00, 0.00, 0.00, 0.00, 55.00) DC INFO: Current KM4 collision model (Atlas (SuperNova, Dual, Cu at home/near, Mo active, extended big cabinet), rail: Extended) Waiting for the end of generator ramping SuperNova device write OK: kV=50.00,mA=0.80,ON RAMP: SuperNova device unlock OK (Tue Mar 27 12:52:10 2018) ODBENCH SUPERN INFO: Close client (others active) RAMP: SuperNova device connection shutdown OK. GUI is still active. (Tue Mar 27 12:52:10 2018) DC3DEVICES: CCSCAM (Ver. 2.1.14.208) device OK (no locking) DC INFO: SuperN settings 50.00kV 0.80mA at Tue Mar 27 12:52:10 2018 Camera settings: CCD chip name "KAF-4320E" channels 4 height 2088 width 2096 active area height 2088 width 2096 x 0 y 0 HW ang brd pressent 1 ang config loaded dsp firmware ok 1 fpga firmware ok 1 temperature ready 1 ang brd type 1 MISC expander 221 free space 206172 PICTURE param autoupload 1 correction raw format raw ref type median analog channel 1 binning 2 originx 18 originy 18 state ref0 1493 state ref1 1074 state ref2 1194 state ref3 1408 VOLTAGES dac_ref1 75 mV dac_ref2 94 mV dac_ref3 100 mV dac_ref4 87 mV h1 amplitude 10000 mV h1 offset 0 mV h1l amplitude 10000 mV h1l amplitude -3000 mV h2 amplitude 10000 mV h2 offset -3000 mV reset amplitude 12000 mV reset offset 2000 mV v1 amplitude 8000 mV v1 offset -8000 mV v2 amplitude 8000 mV v2 offset -8000 mV TIMINGS 1X1 adc sample delay -80 ns adc sample width 40 ns amp time off 4000 ms amp time on 3000 ms h setup time 50000 ns h first 60 ns h last 0 ns h width 600 ns reset delay 0 ns reset width 80 ns sh delay -280 ns sh width 220 ns v1 middle width 40000 ns v1 negative width 40000 ns v1 positive width 40000 ns v2 delay 40000 ns v2 negative width 40000 ns v2 pulse width 40000 ns TIMINGS 2X2 adc sample delay -80 ns adc sample width 40 ns amp time off 4000 ms amp time on 3000 ms h setup time 50000 ns h first 320 ns h last 220 ns h width 180 ns reset delay 0 ns reset width 80 ns sh delay -280 ns sh width 220 ns v1 middle width 40000 ns v1 negative width 40000 ns v1 positive width 40000 ns v2 delay 40000 ns v2 negative width 40000 ns v2 pulse width 40000 ns TIMINGS 4X4 adc sample delay -80 ns adc sample width 40 ns amp time off 4000 ms amp time on 3000 ms h setup time 50000 ns h first 300 ns h last 220 ns h width 180 ns reset delay 0 ns reset width 80 ns sh delay -280 ns sh width 220 ns v1 middle width 40000 ns v1 negative width 40000 ns v1 positive width 40000 ns v2 delay 40000 ns v2 negative width 40000 ns v2 pulse width 40000 ns System uptime: 3w 5d 23h 19m 17s Network connection information (Tue Mar 27 12:52:10 2018) Connected to ROOT\CIMV2 WMI namespace Adapter : Intel(R) PRO/1000 PL Network Connection Speed: 1000000000 MaxSpeed: 1000000000 MACAddress:00:D0:C9:C4:15:16 Status: 00:D0:C9:C4:15:16 Adapter : Intel(R) 82566DM-2 Gigabit Network Connection Speed: 100000000 MaxSpeed: 100000000 MACAddress:00:D0:C9:C4:15:15 Status: 00:D0:C9:C4:15:15 Adapter : Intel(R) PRO/1000 GT Desktop Adapter Speed: 1000000000 MaxSpeed: 1000000000 MACAddress:90:E2:BA:06:D2:84 Status: 90:E2:BA:06:D2:84 EXPECTED FINISH TIME: (0,15,end:Tue Mar 27 12:54:47 2018) System uptime: 3w 5d 23h 19m 17s Going to 28.000000 -24.304290 70.000000 0.000000 53.000000 Run 1 started at Tue Mar 27 12:52:11 2018 Experiment: D:\Data\xs1714a\pre_xs1714a Omega scan: 28.000 to 33.000 ( 5 frames, 3.000s, 1.000deg) at t: -24.304,k: 70.000,p: 0.000,dd: 53.000 DC3DEVICES: Dualchiller (Ver. 2.5.3.34 - Final_Rev772_PCB7) device OK (no locking) DC INFO: Cryojet settings 293.0K 28.700% 13.800% at Tue Mar 27 12:52:14 2018 Run 1 ended EXPECTED FINISH TIME: (5,15,end:Tue Mar 27 12:54:35 2018) Going to 28.000000 -24.304290 70.000000 90.000000 53.000000 Run 2 started at Tue Mar 27 12:52:54 2018 Experiment: D:\Data\xs1714a\pre_xs1714a Omega scan: 28.000 to 33.000 ( 5 frames, 3.000s, 1.000deg) at t: -24.304,k: 70.000,p: 90.000,dd: 53.000 Run 2 ended EXPECTED FINISH TIME: (10,15,end:Tue Mar 27 12:54:33 2018) Going to 28.000000 24.616790 -70.000000 90.000000 53.000000 Run 3 started at Tue Mar 27 12:53:46 2018 Experiment: D:\Data\xs1714a\pre_xs1714a Omega scan: 28.000 to 33.000 ( 5 frames, 3.000s, 1.000deg) at t: 24.617,k: -70.000,p: 90.000,dd: 53.000 Run 3 ended Camera settings: CCD chip name "KAF-4320E" channels 4 height 2088 width 2096 active area height 2088 width 2096 x 0 y 0 HW ang brd pressent 1 ang config loaded dsp firmware ok 1 fpga firmware ok 1 temperature ready 1 ang brd type 1 MISC expander 221 free space 206172 PICTURE param autoupload 1 correction raw format raw ref type median analog channel 1 binning 2 originx 18 originy 18 state ref0 1493 state ref1 1074 state ref2 1193 state ref3 1407 VOLTAGES dac_ref1 75 mV dac_ref2 94 mV dac_ref3 100 mV dac_ref4 87 mV h1 amplitude 10000 mV h1 offset 0 mV h1l amplitude 10000 mV h1l amplitude -3000 mV h2 amplitude 10000 mV h2 offset -3000 mV reset amplitude 12000 mV reset offset 2000 mV v1 amplitude 8000 mV v1 offset -8000 mV v2 amplitude 8000 mV v2 offset -8000 mV TIMINGS 1X1 adc sample delay -80 ns adc sample width 40 ns amp time off 4000 ms amp time on 3000 ms h setup time 50000 ns h first 60 ns h last 0 ns h width 600 ns reset delay 0 ns reset width 80 ns sh delay -280 ns sh width 220 ns v1 middle width 40000 ns v1 negative width 40000 ns v1 positive width 40000 ns v2 delay 40000 ns v2 negative width 40000 ns v2 pulse width 40000 ns TIMINGS 2X2 adc sample delay -80 ns adc sample width 40 ns amp time off 4000 ms amp time on 3000 ms h setup time 50000 ns h first 320 ns h last 220 ns h width 180 ns reset delay 0 ns reset width 80 ns sh delay -280 ns sh width 220 ns v1 middle width 40000 ns v1 negative width 40000 ns v1 positive width 40000 ns v2 delay 40000 ns v2 negative width 40000 ns v2 pulse width 40000 ns TIMINGS 4X4 adc sample delay -80 ns adc sample width 40 ns amp time off 4000 ms amp time on 3000 ms h setup time 50000 ns h first 300 ns h last 220 ns h width 180 ns reset delay 0 ns reset width 80 ns sh delay -280 ns sh width 220 ns v1 middle width 40000 ns v1 negative width 40000 ns v1 positive width 40000 ns v2 delay 40000 ns v2 negative width 40000 ns v2 pulse width 40000 ns Network connection information (Tue Mar 27 12:54:22 2018) Connected to ROOT\CIMV2 WMI namespace Adapter : Intel(R) PRO/1000 PL Network Connection Speed: 1000000000 MaxSpeed: 1000000000 MACAddress:00:D0:C9:C4:15:16 Status: 00:D0:C9:C4:15:16 Adapter : Intel(R) 82566DM-2 Gigabit Network Connection Speed: 100000000 MaxSpeed: 100000000 MACAddress:00:D0:C9:C4:15:15 Status: 00:D0:C9:C4:15:15 Adapter : Intel(R) PRO/1000 GT Desktop Adapter Speed: 1000000000 MaxSpeed: 1000000000 MACAddress:90:E2:BA:06:D2:84 Status: 90:E2:BA:06:D2:84 Data collection successfully finished at Tue Mar 27 12:54:22 2018 DC3DEVICES DEVICE INFO: Shutting down log devices... DC3DEVICES DEVICE INFO: Shutting down Peltier device (CCSCAM) ... CCSCAM device connection shutdown OK (pUnLockAndShutdownDC3DEVICES). DC3DEVICES DEVICE INFO: Stopped Peltier device (CCSCAM) ... DC3DEVICES DEVICE INFO: Shutting down Dual chiller device (DualChiller) ... Dualchiller device connection shutdown OK (pUnLockAndShutdownDC3DEVICES). DC3DEVICES DEVICE INFO: Stopped Dual chiller device (DualChiller) ... DC3 INFO: Waiting for end of pre-experiment analysis... Reading tabbin file: "D:\Data\xs1714a\pre_xs1714a_peakhunt" UB - matrix: -0.069967 0.030657 0.089101 ( 0.000163 0.000158 0.000168 ) -0.068858 -0.065594 -0.010716 ( 0.000153 0.000148 0.000158 ) 0.109112 -0.153091 0.115835 ( 0.000229 0.000221 0.000236 ) M - matrix: 0.021542 -0.014332 0.007143 ( 0.000059 0.000046 0.000043 ) -0.014332 0.028679 -0.014299 ( 0.000046 0.000071 0.000048 ) 0.007143 -0.014299 0.021472 ( 0.000043 0.000048 0.000062 ) UB fit with 79 obs out of 81 (total:81,skipped:0) (97.53%) unit cell: 5.915(9) 5.916(10) 5.923(9) 60.05(16) 89.99(13) 60.02(17) V = 146.7(3) Process information (Tue Mar 27 12:56:17 2018) ID: 2932; threads 34; handles 860; mem 515292.00 (1228656.00)kB; time: 1w 4d 22h 1m 47s MEMORY INFO: Memory PF:251.0, Ph:417.0, V:1199.0; pDataCollectionHParentDistConcurrentDC3 25 MEMORY INFO: Process info - Handles: 861, Memory: PF:503.3,peak PF: 697.1, WS: 294.7, peak WS: 556.7 MEMORY INFO: CCD G:2.5,H:33.2 (#1016),V:133.5 (#26) MEMORY INFO: Tracker: CCD 131.3 (#6) MEMORY INFO: Image pool: CCD 25.7/276.0 (#10, page size: 4096) CCD PAR INFO: Correction kept - Dark subtraction: on; Flood correction: on (in CCD) DC PRE ACTION: before iFinalDCPREPREXP DC INFO: Custom DC settings (binning: 4x4, correlation:ON)